1. Field of the Invention
The present invention relates to light-emitting display array screens formed of an assembly of light-emitting diodes (LEDs). These are, for example, screens formed of organic diodes (“OLED”, for Organic Light-Emitting Display) or polymer diodes (“PLED”, for Polymer Light-Emitting Display). The present invention more specifically relates to the regulation of the supply voltage of the circuits controlling the LEDs of such screens.
2. Discussion of the Related Art
FIG. 1 shows an array screen comprised of n columns C1 to Cn and k lines L1 to Lk enabling addressing of n*k LEDs d, the anodes of which are connected to a column and the cathodes of which are connected to a line.
Line control circuits CL1, to CLk enable respectively biasing lines L1 to Lk. Only a single line is activated at a time, and is grounded. The non-activated lines are biased to a voltage Vline.
Column control circuits CC1 to CCn enable respective biasing of columns C1 to Cn. The columns addressing the LEDs which are desired to be activated are biased by a current to a voltage Vcol greater than the threshold voltage of the LEDs of the screen. The columns which are not desired to be activated are grounded.
An LED connected to the activated line and to a column biased to Vcol is then on and emits light. Voltage Vline is provided to be sufficiently high so that the LEDs connected to the non-activated lines at voltage Vcol and to the columns are not conductive and do not emit light.
FIG. 2 shows a column control circuit CC and a line control circuit CL respectively addressing a column C and a line L connected to an LED d of the screen. Line control circuit CL comprises a power inverter 1 controlled by a line control signal φL. Power inverter 1 comprises an NMOS transistor 2 enabling discharge of line L when φL is high and a PMOS transistor 3 enabling charging line L to bias voltage Vline when φL is low.
Column control circuit CC comprises a current mirror formed in the present example with two transistors 4, 5 of type PMOS. Transistor 4 forms the reference branch of the mirror and transistor 5 forms the duplication branch. The sources of transistors 4 and 5 are connected to a biasing voltage Vpol on the order of 15 V for OLED screens. The gates of transistors 4 and 5 are connected to each other. The drain and the gate of transistor 4 are connected to each other. Transistor 4 is thus diode-assembled, the source-gate voltage (Vsg4) being equal to the source-drain voltage (Vsd4). The current conducted by transistor 4 is set by a current source 6 connected to the drain of transistor 4. Current 6 provides a so-called “luminance” current I1. The drain of transistor 5 is connected to column C via a column selection circuit formed of a PMOS transistor 7 and of an NMOS transistor 8. The source of PMOS transistor 7 is connected to the drain of transistor 5 and the drain of transistor 7 is connected to column C. The source of transistor 8 is grounded and its drain is connected to column C. A column control signal φC is connected to the gate of PMOS transistor 7 and to the gate of NMOS transistor 8. When column control signal φC is high, transistor 8 discharges column C. When it is low, transistor 7 is on and column C charges to reach voltage Vcol. When line L and column C are activated, line control signal φL and column control signal φC are respectively high and low, LED d is on and the current flowing through the diode is equal to luminance current I1.
However, for column control circuit CC to operate as described previously, it is necessary for voltage Vpol to be sufficiently high for the copy of current I1 to be correct. Biasing voltage Vpol is equal to the sum of source-drain voltage Vsd2 of transistor 2, of voltage Vd across LED d, of source-drain voltage Vsd7 of transistor 7, and of source-drain voltage Vsd5 of transistor 5.
When the copy of current I1 is correct, transistor 5 is in saturation state and voltage Vsd5 is at least equal to source-drain voltage Vsd4 of transistor 4. A correct copy thus imposes requires for biasing Vpol to be at least equal to the previously-mentioned sum when the current flowing therethrough is equal to luminance current I1. If biasing voltage Vpol is too low, the current flowing through LED d is smaller than current I1 and the luminance of the diodes is insufficient.
Luminance current I1 provided by current source 6 may generally vary according to the luminance desired for the screen. When luminance current I1 increases, source-drain voltage Vsd4 of diode-assembled transistor 4 increases and voltage Vd of light-emitting diode d also increases. As a result, biasing voltage Vpol must be sufficiently high for transistor 5 to be in saturation whatever the luminance current.
However, in a concern for electric power saving, biasing voltage Vpol is desired to be reduced, which then enables reducing voltage Vline of the line control circuits.
There exist control circuits which have a fixed biasing voltage Vpol determined according to the maximum desired luminance current I1. The disadvantage of such circuits is their large electric power consumption.
There exist other control circuits for which biasing voltage Vpol varies according to the desired luminance current I1. If current I1 is low, voltage Vpol is low, and conversely. However, it is necessary to provide a security margin to take the aging of the LEDs of the screen into account. Indeed, for an equal current in LED d, voltage Vd across the diode increases along time. For a same luminance, the necessary minimum biasing voltage Vpol thus progressively increases along time. The power savings obtained for these circuits are thus not optimal.